ECE 6913 RISC V Project A
Performance Modelling – RISC-V processor This project will require you to implement cycle-accurate simulators of a 32-bit RISC-V processor in C++ or Python. The skeleton code for the assignment is given in le (NYU_RV32I_6913.cpp or NYU_RV32I_6913.py). The simulators should take in two les as inputs: imem.text and dmem.txt les The simulator should give out the …