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Quiz 3. Note: Full solution, please.
Question 1 (3 marks)
Optimize the following Boolean functions F together with the don’t‐care conditions in (1) sum‐of‐products and (2) product‐of‐sums form:
a. F(A ,B ,C,D)=Σm(2, 4, 9, 12, 15) + d(3, 5, 6, 13) Rubrics:
Correct Kmaps (1 mark) show the groupings. Sum of Product Form Equation (1 mark). Product of Sums Form Equation (1 mark).
Question 2 (2 marks)
Perform technology mapping to NAND gates for the circuit shown below. Use gate types selected from: Inverter, 2-input NAND, 3-input NAND, and 4-input NAND.
Show where the inversion bubbles are (1 mark).
Redraw the final circuit using only the gate types selected in Q2 (1 mark)
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Question 3 (2 marks)
What does the logic circuit in Figure 1 do? Please provide the timing diagrams. Note: Assume zero (0) initial states and positive triggering for all D flip-flops.
X and Y waveforms (2 marks) Z waveform Bonus (1 mark)
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Question 4 (3 marks)
Clock, S, and R waveforms, one latch, and two flip-flops are shown in the figure below. For the latch and the flip-flops, carefully sketch the output waveform, Qi, obtained in response to the input waveforms. Assume that the propagation delay of the storage elements is negligible. Initially, all storage elements store zero (0).
SR Flip-flop is in Master-Slave Configuration.
Rubrics: 1 mark each correct waveform of Q1, Q2, and Q3.
Programming Help, Add QQ: 749389476